Forum Discussion
Altera_Forum
Honored Contributor
11 years agoThank you for your response. Correct! I have the input (Pin 9) setup as HCSL I/O standard in Quartus, which automatically assigns Pin 8 as the _n (and I confirmed this is actually happening). We have also probed the resistors and the clocks are not active... and this is on multiple boards. Either the Si5338 devices are not configured properly by the manufacturer of the dev kit, or Quartus does not like how we have the inputs setup and is driving the signal low. There is still some unknowns.
I'm curious to know if anyone else has a similar issue with the Arrow SoC Kit (Rev. C and Rev. D). R/ Nick