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Santhakumar's avatar
Santhakumar
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5 years ago

Arria V PCie Issue

We designed a custom board based on Arria V FPGA (5AGXMB1G4F40C5G). Problem is with PCIe interface. this board is designed to have end point support, the link training is not happening with extern...
Rahul_S_Intel1's avatar
Rahul_S_Intel1
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5 years ago

Hi ,

Do you have checked the Quartus project, how is the pin assignment.

From the background, I feel the clock itself is not coming means, may be Quartus Project issue.

Or the signal is not reaching to the FPGA .

  • Santhakumar's avatar
    Santhakumar
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    5 years ago

    Hi Rahul,

    FPGA team verified at their level don't see any issues. So we think may be package damaged or assembly issue (But xray reports shows BGA mounting is good)

    We have one more 100MHz clock connected to pins C20 & D20 for DDR3. in chip scope we could able to see this clock.

    Can this be used for PCIe interface as well.

    -Santhakumar.

    • Rahul_S_Intel1's avatar
      Rahul_S_Intel1
      Icon for Frequent Contributor rankFrequent Contributor
      5 years ago

      Hi ,

      Is it possible to have a call. Let me know your availability. If you can send me the no: in personal message that will be really easy for me.

      Regards,

      Rahul S

      • Santhakumar's avatar
        Santhakumar
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        5 years ago

        I have sent a private message to you. Pls call me ASAP.

        Thanks.

        SK.