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Altera_Forum's avatar
Altera_Forum
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12 years ago

Arria V dual fpga pcie endpt - AN532 & AN431, has anyone ported either to dev board?

Hi, I'm trying to port the AN431 pcie endpoint design example to the dual Arria V development board. Has anyone done this already? If yes, would you be able to share the input signals that the ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I see the 1.4V PCML in the demo qsf. Now going to map the pcie pins to the top-level. I've also posted my latest top level instantiating the endpoint. Still not totally sure about how to drive the hip_pipe_ and alt_xcvr_reconfig_0_reconfig_mgmt signals.