Forum Discussion
Arria 10 SoC DevKit: Can I drive DB-9 RS-232 port from HPS UART0 ?
- 7 years ago
Hi,
I now have the HPS UART0 routed through the FPGA OK to the DB9 RS-232 port.
The UART_RS232 soft IP is not required in the FPGA.
My problem here was caused by the RS-232 PHY on the dev board operating in an auto-shutdown mode that meant that the external tx/rx loopback test I was attempting would never wake the PHY.
Thanks,
Paul
Hi -
Sorry - been off working on other things for a while....
I'm confused here.....Why would I need the "UART_RS-232 soft IP" ? The UART controller is already implemented as UART0 in the HPS isn't it ? Can I not just get the HPS UART0 Rx/Tx signals routed to CRC_ERROR (AU21)/CVP_CONFDONE(AV22) in the FPGA without adding the FPGA UART soft IP ? If so, are there some simple steps for a platform designer novice to follow to do this or an example design that does this available ?
Thanks !
- PHJ7 years ago
Occasional Contributor
Can someone from Intel please comment on this ?
I need to receive/transmit data from/to the dev board DB-9 RS-232 port on UART0 in the HPS.
What FPGA configuration do I need for this - do I need the UART_RS-232 soft IP implemented in the FPGA, or can I just configure the HPS UART0 Rx/Tx signals to be routed to CRC_ERROR/CVP_CONFDONE ?
Is any configuration required in the MAX V for this ?