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User1580871742356367's avatar
User1580871742356367
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Arria 10 HPS DDR4 calibration fail and no emif_usr_clk

Story: HPS DDR4 calibration failed (discrete, 32bit). No emif_usr_clk by putting signal tap PLL locked both local_cal_success and local_cal_fail are LOW Questions: Why there was no emif_us...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
5 years ago

What leads to you believing there is no emif_usr_clk? Do you not see it coming from the IP in Platform Designer?

And the first stage bootloader is what runs to initialize and calibrate the external memory, so this is before uboot for Arria 10.

#iwork4intel

  • User1580871742356367's avatar
    User1580871742356367
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Thank you very much for the reply.

    emif_usr_clk is used as Signal Tap clock and Signal Tap was triggering and waiting for the clock.