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CHung's avatar
CHung
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

AN881 reference design need to be upgraded for device 1SM21CH.

Hi, ​ The following reference design is based on 1SM21BH device. https://fpgacloud.intel.com/devstore/platform/19.1.0/Pro/an881-pcie-avmm-dma-gen3x16-ddr4-and-hbm2/ ​ We use Stratix 10 MX 1SM21C...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi Sir,

Can we get the signal tap waveform for now?

From the screenshot, I can see you are unable to change to DDR4. Can you type 2 and try to change it to HBM2?

  • CHung's avatar
    CHung
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Hi,

    ​

    Yes. The signalTap shows lane_act = 0x10, and ltssmstate = 0x11.

    If you need other signals, please let me know.

    ​

    We have tried -1, 2, and 4, all of the options showed "Could not change BAR!".

  • CHung's avatar
    CHung
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Hi,

    ​

    As below figure, it seems BAR setting has something wrong.

    ​

    The path is our FPGA PCIe device​:

    /sys/bus/pci/devices/0000:01:00.0

    ​

    And then we see resources are zero: