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Yes, it looks like irq_line is assigned two different values, first from reading the appropriate configuration byte, then with the line above. Probably left over from testing the driver. I would say that "irq_line = dev->irq;" is the more important line in the driver, since the variable discards what it receives from the configuration byte and uses this value. So you could delete the pci_read_config_byte line and the printk statement that prints its value. But it provides a nice little bit of debugging info and it works just fine.
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Well it didn't make any difference though. In mean time, i have tested it in 32-bit Linux. Log is as below (it is with Quartus 8.0/8.1/9.0):
=======================================
altpciechdma init(), built at Mar 20 2009 22:14:41
probe(dev = 0xf79c5400, pciid = 0xf8b77c20)
Testing probe function
probe() ape = 0xf63196c0
sizeof(struct ape_chdma_table) = 4096.
table_virt = 0xfffffffff3e57000, table_bus = 0x 33e57000.
ACPI: PCI Interrupt 0000:06:00.0[A] -> GSI 16 (level, low) -> IRQ 16
PCI: Setting latency timer of device 0000:06:00.0 to 64
Enabled MSI interrupting.
RevisionID is supported by this driver 0x1
VendorID is supported by this driver 0x1172
DeviceID is supported by this driver 0xe001
Could not set 64-bit DMA mask.
Using a 32-bit DMA mask.
IRQ pin# 1 (0=none, 1=INTA#...4=INTD#).
IRQ line# 11.
IRQ line post assigning# 216.
Succesfully requested IRQ# 216 with dev_id 0xf63196c0
BAR0 0xf0000000-0xf0ffffff flags 0x0000120c
BAR2 0xb7200000-0xb72003ff flags 0x00000200
BAR[0] mapped at 0xf8b60000 with length 32768(/16777216).
BAR[2] mapped at 0xf8b58000 with length 256(/1024).
bar_tests(), PAGE_SIZE = 0x1000
write_header = 0xf8b58000.
read_header = 0xf8b58010.
&write_header->w3 (intiates DMA) = 0xf8b5800c
&read_header->w3 (initiates DMA) = 0xf8b5801c
ape->table_virt = 0xf3e57000.
Allocated cache-coherent DMA buffer (virtual address = 0xfffffffff3e70000, bus address = 0x0000000033e70000).
writing read header 0x000400ff to 0xf8b58010
writing higher bus address 0x00000000 to 0xf8b58014
writing lower bus address 0x33e57000 to 0xf8b58018
Flush posted writes
Start DMA read
writing (to w3 initiate DMA) 0x000000fe to 0xf8b5801c
EPLAST(w3 register ORed) = 64222
POLL FOR READ:
EPLAST = 64222, n = 254
EPLAST = 9, n = 254
EPLAST = 20, n = 254
EPLAST = 31, n = 254
EPLAST = 42, n = 254
EPLAST = 52, n = 254
EPLAST = 63, n = 254
EPLAST = 73, n = 254
EPLAST = 84, n = 254
EPLAST = 94, n = 254
EPLAST = 105, n = 254
EPLAST = 116, n = 254
EPLAST = 127, n = 254
EPLAST = 137, n = 254
EPLAST = 148, n = 254
EPLAST = 159, n = 254
EPLAST = 169, n = 254
EPLAST = 180, n = 254
EPLAST = 190, n = 254
EPLAST = 201, n = 254
EPLAST = 211, n = 254
EPLAST = 222, n = 254
EPLAST = 232, n = 254
EPLAST = 243, n = 254
EPLAST = 254, n = 254
DONE# IRQs during transfer: 2
Start DMA write
POLL FOR WRITE:
EPLAST = 64222, n = 254
EPLAST = 9, n = 254
EPLAST = 21, n = 254
EPLAST = 32, n = 254
EPLAST = 43, n = 254
EPLAST = 55, n = 254
EPLAST = 66, n = 254
EPLAST = 77, n = 254
EPLAST = 88, n = 254
EPLAST = 100, n = 254
EPLAST = 111, n = 254
EPLAST = 122, n = 254
EPLAST = 133, n = 254
EPLAST = 145, n = 254
EPLAST = 156, n = 254
EPLAST = 167, n = 254
EPLAST = 178, n = 254
EPLAST = 189, n = 254
EPLAST = 201, n = 254
EPLAST = 212, n = 254
EPLAST = 223, n = 254
EPLAST = 234, n = 254
EPLAST = 245, n = 254
EPLAST = 254, n = 254
DONE# IRQs during transfer: 1
[f3e70000] = 0xf3e70000 != [f3e72000] = 0x00000000 ?!
[f3e70004] = 0xf3e70004 != [f3e72004] = 0x00000000 ?!
[f3e70008] = 0xf3e70008 != [f3e72008] = 0x00000000 ?!
[f3e7000c] = 0xf3e7000c != [f3e7200c] = 0x00000000 ?!
[f3e70010] = 0xf3e70010 != [f3e72010] = 0x00000000 ?!
[f3e70014] = 0xf3e70014 != [f3e72014] = 0x00000000 ?!
[f3e70018] = 0xf3e70018 != [f3e72018] = 0x00000000 ?!
[f3e7001c] = 0xf3e7001c != [f3e7201c] = 0x00000000 ?!
[f3e70020] = 0xf3e70020 != [f3e72020] = 0x00000000 ?!
---more errors follow! not printed---
DMA loop back test FAILED.
bar_tests() end, result -1
probe() successful.
altpciechdma 0
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