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Even though the LVDS connections are logically compatible, you will still need to check the single-ended signals. Go back to the DE115 schematic, and find out the VCCIO of the HSMC single-ended signals. Then check there will be no driver conflicts with the SPI/I2C signals.
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As I can see from ADC EVM schematic, SPI lines on the output connector (SEN, SDATA, SCLK) are normally left floating on the board and one can choose to use them installing some resistors. So I should have no problem there since I can still communicate with SPI via USB connection, as the board permits to do.
There are HSMC_D1 and HSMC_D2 left. HSMC_D1 is another SPI bus signal, used by a component on the TI board which I don't need to use (it can be isolated from the power supply by removing a jumper), so it shouldn't be a problem either. The only signal I need to use is on HSMC_D2, which is still connected to FPGA BANK 5 and carries an over-range output bit coming directly from ADC. Voltage levels for this ADC logic output are: VOH = 1.7 V and VOL = 0.1 V.
So here's my first question: I've already set HSMC_VCCIO = 2.5 V for using LVDS. This setting has effect for all BANK 5 and BANK 6 pins, right? So for HSMC LVCMOS lines (from Cyclone IV datasheet p.12) it has to be: VIL = 0.7 V, VIH = 1.7 V. So I'm exactly on the threshold for the high logic state: is it going to be a problem without any solution?
Actually, the same OVR signal from EVM board is repeated (can't understand why, maybe I'll ask to TI forum) on another output connector pin, which becomes INPUT3_M signal on HSMC connector: it is still the same 1.8 LVCMOS output, but it is carried on a single LVDS line. I think I won't need it, since I would have here the same situation I had on HSMC_D2, but is it going to be a problem having this undesired signal on INPUT3_M?
Lastly, a curiosity: if I needed to use the LVCMOS signal on INPUT_3M line, would I be able to do it? Or else, can I independently program each pin of my Cyclone IV linked to HSMC connector to be LVDS or LVCMOS?
Regards,
Lorenzo
Honored Contributor
