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pankuolung's avatar
pankuolung
Icon for New Contributor rankNew Contributor
6 years ago

Altera 1588 FPGA solution

Hi there, Just found the Altera 1588 solution AN739 as the attached file and downloaded the reference design then try to run it. When I opened it using Quartus, It shows can't find the qip file as...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

HI,


Alright, so you have get the TSE MAC working and now the issue seems to resides in MSGDMA side, right ?


Unfortunately I am not familiar with MSGDMA but I did found some reference design that you can take a look as reference. It's targeting different FPGA product but the reference design did use TSE and MSGDMA. So, you can check it out


https://rocketboards.org/foswiki/News/TripleSpeedEthernetWithMSGDMALinuxExampleDesignIsNowAvailable


Thanks.


Regards,

dlim




AKb's avatar
AKb
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Hi,

Thank you for the link. I had seen that example. It is implemented in Cyclone V SOC and is using Linux. I am using Cyclone 10 Custom board and want to implement triple speed ethernet using msgdma in Nios.

I am now able to read the pumped input data in Buffer using msgdma. The problem is that how to find out the Packet has started and Packet has ended since i am feeding streamed data. I am struck in this problem.

If possible kindly guide

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