Forum Discussion
Occasional Contributor[Agilex]:Error Sending Bitstream..!!
Hi Raju,
Thanks, will close this and move the support to below to avoid any confuse.
Compilation Error in Quartus Prime 23.3 for Agilex PCIe Root Port Design Example - Intel CommunityRegards,
Wincent_Intel
p/s: If any answer from the community or Intel Support is helpful, please feel free to give the best answer or rate 9/10 survey.
Occasional ContributorHi @Wincent_Altera ,
Thank you for your response, but it appears our issue remains unresolved. Please find the attached log for reference.
I have attached a log file for your reference. Please review it and let me know what steps to take next to address our issue.
Thanks & Regards
Satrasala Raju
Regular ContributorHi Raju,
Did you add the hps2fpga-bridge node in your device tree.
If not, then please add this. Reference is given on below link-
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
Please check and ensure you use the correct image file, if not please re-download.
If cannot, I suggest you to file another forum case , please ensure you choose the categories as "embedded" , "HPS" or any related...
The correct support specialist will be there to support you.
Regards,
Wincent_Intel
