I have a Devkit - MK-A5E065BB32AES1. I downloaded the examples from the following link: https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/a5e065b-modular.html I...
I am trying to use the same design and plug in to my Agilex5 Modular devkit. See if I am able to replicate your issue or not, I might take sometime as my devkit been occupied by other person for some urgent issue. Will get back to you within 3-5 days.
Meanwhile,
is it possible to try in another host ? see if the issue is following or not, so that we can narrow down either is fpga issue or host issue.
Do you configure your Host setting ? normally the host setting by default will be "AUTO" for PCIe sides I ever experience certain type of host is unable to direct negotiated the speed which causing link up problem. Please try to set into your desired speed based on design instead of using "Auto"
I try to replicate in the same design that provided to you. the link up was success, and I do not found any unusual issue.
is it possible to try in another host ? see if the issue is following or not, so that we can narrow down either is fpga issue or host issue.
Do you configure your Host setting ? normally the host setting by default will be "AUTO" for PCIe sides I ever experience certain type of host is unable to direct negotiated the speed which causing link up problem. Please try to set into your desired speed based on design instead of using "Auto"
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