[ADC-SoC] the examples for that board collect 50K samples, as far as i understand due to the on-board memory limit. is it possible to collect to 5M samples (continuously) ?

Hi,

Unfortunately, we do not any example design that is related to SDRAM usage for ADC.

However, you may design that the on-chip memory to transfer the data to sdram, but requires a DMA controller, there is an example you may check:

https://github.com/robertofem/CycloneVSoC-examples