Access DDR3 RAM from Linux program on HPS

Hi Berlazare_I_Intel,

thank you for your answer.

I want to address the external DDR3 memory (1GB), build in in the Terasic DE10-nano Board.

In the user manual of this evaluation board it is written, that it is connected to the dedicated Hard Memory Controller for the HPS.

So I guess my question better should be: How can I work with the Hard memory controller of the HPS from a C++ application running on Linux on the ARM Processor.

My C++ application received data over ethernet which I want to store in the external DDR memory of the DE10-nano board.

I don't want to use the FPGA fabric right now. The application is running on the linux distribution on the ARM processor of the HPS.

In the meantime I found an example how to write data into the DDR3 memory from Preloader on page 33 of the following document:

(https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/external-memory/emi_fd_controller_hps.pdf).

In this example data is just written to a memory space starting at the address 0x100000 .

long *base= 0x100000;

addr = base + cnt; /* pointer arith! */

sync ();

*addr = data_temp[i];

Is this what I need to do?

Do I have to map the memory somehow before I can use it?

Where is written that the base address is 0x100000 ?

I had a look into the Cyclone V HPS Memory Map (https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/hps.html#topic/sfo1418687413697.html) but I didn't find the address 0x100000

Thank you very much.

Best regards

Johann