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Yamada1's avatar
Yamada1
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

About the Arria 10 FPGA Development Kit

About the Arria 10 FPGA Development Kit It would be helpful if you could tell me about the signals on the FMC connector.

1) Are the signals arranged in columns C, D, G, and H wired with equal lengths? For example, do FMCB_LA_TX_P4 and FMCB_LA_TX_N4 have equal length wiring for FMCB_LA_TX_P2? (I am aware that FMCB_LA_TX_P2 and FMCB_LA_TX_N2 are differential signals, so they are routed at equal lengths.)

2) Assuming that each signal is wired with equal length, what is the reference signal?

I am designing a child board to be placed on the Arria 10 FPGA Development Kit, but I need to pass 14-bit parallel signals at high speed, so I need information on the Arria 10 FPGA Development Kit.

We apologize for the inconvenience, but thank you in advance.

7 Replies

    • Yamada1's avatar
      Yamada1
      Icon for Occasional Contributor rankOccasional Contributor

      Thank you for your comment.

      The symmetry is "Intel Arria 10 GX FPGA Development Kit (DK-DEV-10AX115S-A)".

      I'm sorry to trouble you, but it would be helpful if you could teach me.

    • Yamada1's avatar
      Yamada1
      Icon for Occasional Contributor rankOccasional Contributor

      Thank you for answering.

      I found a Gerber file from the material you introduced, but I couldn't find anything that looks like board data.

      It seems that ".ipc" is like that, but it seems that it can not be converted with this owned CAD.

      I'm going to look for a viewer, so if you don't mind, could you tell me what CAD you're using?

      We apologize for the inconvenience, but it would be helpful if you could provide us with the information.

    • Yamada1's avatar
      Yamada1
      Icon for Occasional Contributor rankOccasional Contributor

      Sorry to trouble you, but this issue has been resolved.

      I unzipped the file I found from the URL you introduced, but I overlooked that it was further compressed.

      Sorry for the trouble.

      I apologize for the additional question, but is there a table for the connection between the FMC connector and FPGA?

      Since the current situation is chasing from the circuit diagram, it would be very helpful if there was a connection table.

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor

    As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.