About skew method for source synchronous input constrains in AN433?

Hi Sir, I understand your concern. However, usually the skew between data in and input clock is small and can be ignore. Unless it is critical in your board design and you are seeing the big skew between data and clock. With this you can manually change the - wafeform value for the input clock create clock command to compensate the board skew.

create_clock -name input_clock -period 10 -waveform { 2.5 7.5 } [get_ports clk_in]