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lambert_yu's avatar
lambert_yu
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5 years ago

About fpll recalibration failure problem of transceiver (simplex tx) under cyclone 10

Hi, I am facing one problem, which is about fpll recalibration failure on cyclone 10 board. Just for same .pof file, no timing violation and different cyclone 10 boards, after POR, the transceiv...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Please help to check if the RREF pins of your device are connected individually to 2k Ohm resistor to GND.

Please let me know if there is any concern. Thank you.



Best regards,

Chee Pin


lambert_yu's avatar
lambert_yu
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5 years ago

Hi CheePin,

Just for your question, I make sure that 1,3,4 all are satisfy and for 2, step 1: get bus access; step 2: switch one reference clock to another reference clock; step 3: send recalibration command; step 4: release bus access; step 5: wait for the completion of recalibration.

For another thing, I try 3 boards(all same, except fpga chip), 2 boards work normally, and another usually has this problem.

Brs,

Lambert

  • lambert_yu's avatar
    lambert_yu
    Icon for Contributor rankContributor
    5 years ago

    +fpga chip : 10cx150yu484e6g

    software : quartus 17.1