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DanielGP's avatar
DanielGP
Icon for New Contributor rankNew Contributor
5 years ago

40Gbps Ethernet MACPHY IP Hardware Demo Design using QSFP

Hello! I am trying to test the 40Gbps Demo for Stratix V in Quartus 18.1 Standard Edition. After compiling the project, I get the following error, even though the target device is right: Error (1...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


The protocol spec for 40G is not the same as 10G, which means, you can't use a single 40G Ethernet IP as four individual 10G ethernets. In this case, you should use two 10Gpbs IP.



Regards -SK


  • DanielGP's avatar
    DanielGP
    Icon for New Contributor rankNew Contributor
    5 years ago

    Ok, that was exactly my question, thanks.

    In that case, I will not concern with the 40Gbps IP problem anymore.

    Now, for the 10G, is there another example design for the stratix V development board I could follow? The one you posted above is for the Transceiver Signal Integrity Development Kit and I do not have that one (I even think this one is already discontinued), I have the Stratix V GX FPGA Development Kit.

    Thanks once again!