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JKobl1
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6 years ago
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4-bit Synchronous JK flip flop Counter Erratic

See attached image. Built a simple 4-bit synchronous counter in Quartus Prime using 7473 chips. This works erratically on DE10-Lite board with standard MAX 10 FPGA. Expect synchronous counting, ...
JKobl1's avatar
JKobl1
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6 years ago

Great resources. I've watched the first training slide show and already have a better understanding of SDC file contents and timing constraints. Thank you so much!