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BQi's avatar
BQi
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

20 10GE example design

The customer need 20 10GE in Stratix 10 MX 1SM16B, we use the 10GE low latency 10GE MAC example design. we found it has the parameter NUM_CHANNELS in hdl code the parameter NUM_CHANNELS would be fro...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Can you tried out the Etile pin placement excel tool first as I mentioned in my previous reply ?

  • Don't worry about Quartus design for now as your concern is how to fit 20+ 10GE with one E tile, right ?
  • Different Ethernet setting like RSFEC and PTP may affect the pin placement result also

Once you have verified customer Ethernet design setting requirement is able to fit into one Etile, then only you start look into creating multiple Etile hard IP in Quartus project to estimate the resource.

Thanks.

Regards,

dlim