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nsd's avatar
nsd
Icon for New Contributor rankNew Contributor
4 years ago

入力クロックの条件を教えてください

EP4CE22U14I7NのCLK1端子に40.96MHzの水晶発振器を接続しています。 水晶発振器のスペックは以下の通りですが使用可能でしょうか。 ――――― 型式：DSO321SRAY　(大真空) 供給電圧：＋3.3V±10％ 周波数安定性：±100ppm　(－40～+125℃) 波形シンメトリ：40/60％　(50％Vcc Level) 立上り/立下り時間：8ns　(1...
EngWei_O_Intel's avatar
EngWei_O_Intel
Icon for Frequent Contributor rankFrequent Contributor
4 years ago

Hi there

If I understand your question correctly, you were asking if the external oscillator being used is supported by FPGA. We don't have specific guideline for external oscillator. You need to adhere to clock/pll requirement stated in datasheet below:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-53001.pdf

Referring to 2 KDBs below, Intel doesn't provide following clock input spec:

https://www.intel.com/content/www/us/en/support/programmable/articles/000083116.html

https://www.intel.com/content/www/us/en/support/programmable/articles/000084779.html

Thanks.

Eng Wei