Forum Discussion
两次编译收发器产生不同现象,但时序分析都是过的
Hi Nicole,
Thanks for your update. I understand that two different compilation has led to different observation and the issue is only observed in a specific board.
To further narrow down the issue of TX no output, just would like to check with you on the following:
1. After you download the A.jic to the failing board, just wonder how do you verify that there is no output signal from TX? Are you using oscilloscope to check?
2. Just wonder if you have had a chance to try downloading the raw A.sof to the failing board to see if there is any different in observation?
3. Just would like to check with you if you have had a chance to check on the tx_analogreset, tx_digitalreset, tx_ready, tx_cal_busy and pll_locked signals to see if there is any anomaly.
4. Please help to check on the tx_clkout and tx_pma_clkout to see if there is any valid clock and what is the frequency.
5. Please help to try with latest Q20.1 to see if you can get consistent builds.
As for the cloud, I believe I am unable to retrieve the file from there. Thanks for your help. However, we shall perform debugging from the above perspectives first. We shall engage timing team after further narrowing down.
Please let me know if there is any concern. Thank you.
Best regards,
Chee Pin
- CheepinC_altera6 years ago
Regular Contributor
Hi, You can tap these signals using signaltap or route the signals to an output pin and monitor at the oscilloscope. In signaltap, we are trying to see if there is any clock signal activities. With scope, we can verify the signal as well as if it is of the right frequency. Generally when the clkout is having correct frequency, the TX should be working. Thank you. Best regards, Chee Pin