Why don't support 100% traffic performance with N3000 PAC Board?

Hi. HRZ(Customer), Thanks for your interest.

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In the result of my test, i know that the reason was caused by a slight difference of the internal operating clock as your opinion.

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In the N3000 board, divided into blue and green area. the green area is the user coding area, and the blue area is the N3000 area that the user cannot handling.

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To solve the problem, I need to conduct a careful review of the Ethernet PHY & MAC & Avalon-ST Interface blocks.

but these are all included in the Blue area. so I can't review.

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The H/W System(physical interface) in communication must support Wired-Speed.

I have to prove Wired-Speed in terms of developing it. but i can't by blue area.

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I think, In the Ethernet Link, the receive block will use the recovering clock(locking clock by transmit clock on the other side), and transmit block will use internal clock.

​I guess, need to modify clock of transmit block in the blue area.

Currently, the clock supplied ​to the Green Area is designed to use one clock for transmission and reception.

thanks.