New ContributorWhat is the total external memory bandwidth of a device like stratix 10 MX? Is it dependent of number of GPIO pins or something else? Like stratix 10 mx has somewhere around 600 GPIO pins, so does it mean that we can bring 600 bits of data in one clock or is the bandwidth dependent on something like transceiver tile?
Frequent ContributorHi Sir,
Are you asking for external memory solution like DDR4?
If for external memory solutions, then it is depend on the device package that you wish to use. The largest device are support up to 4x72bits interface.
You may use the EMIF device selector to determine which package that you need to support your desire bandwidth.
*You mentioned 600 I/O for your target device, but not all IO pin can use to build the data bits of the external memory. You may see EMIF UG for details about EMIF architecture.
If you are referring to HBM2 solutions, it is support up to 512GBps bandwidth in single package.
Please refer to this document for HMB2 introduction.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01264-stratix10mx-devices-solve-memory-bandwidth-challenge.pdf#page=4
New ContributorThanks .... that selector was what i was looking for.
