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DongWang-BJTU's avatar
DongWang-BJTU
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
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What are the feedback FIFOs used for in the loops for OpenCL single work-item kernel

I noticed that the offline compiler automatically generates FIFOs (as shown in the following figure ) for each loops in the kernel. It is said that the FIFOs are used to support non-stalling of the pipeline instructions. However, I could not really understand. Can anyone gives a hint or explain this by giving an example ? Thx

  • MEIYAN_L_Intel's avatar
    MEIYAN_L_Intel
    6 years ago

    Hi,

    1) Currently, there’s no way to directly control the depth of a Feedback FIFO. The only ways you can affect a Feedback FIFO is to restructure the code to use a smaller datatype (e.g. uchar instead of ushort) or change the access pattern if it’s a memory (register, M20K, or MLAB). You can remove the Feedback FIFO by finding a way to move its associated variable inside the loop so no state information is required.

    2) The FFwd Dest node is effectively the end point of a wire. Basically, it represents the dataflow of a variable that could come from outside or inside the loop. It’s not directly related to a Feedback node. This terminology is confusing and I had reported to the team.

    Thanks

5 Replies

  • MEIYAN_L_Intel's avatar
    MEIYAN_L_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hi,

    A Feedback FIFO is used to buffer values of variables for subsequent iterations of a loop. They keep the cluster stall free by ensuring that loop iterations will launch according to their II scheduled by the compiler.

    Thanks

    • DongWang-BJTU's avatar
      DongWang-BJTU
      Icon for Occasional Contributor rankOccasional Contributor
      6 years ago

      Hi Mylee, Thanks for the quick reply.

      I have two more questions concerning the generated circuits:

      1) based on my experience, the feedback FIFOs can consume a significant amount of MLAB or M20K resources for some complicated loops. Is there any way to manually control the depth of the generated feedback FIFOs to allow users to make trade-offs between performance and on-chip resources by their own ? Or anyway to avoid using these FIFOs ?

      2) what are the "FFwd Dest" nodes in the loop graph view used for ? It seems the these symbols are generated by the offline compiler, and do they represent a connection point with the feedback nodes from outside of the current loop ?

  • MEIYAN_L_Intel's avatar
    MEIYAN_L_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hi,

    1) Currently, there’s no way to directly control the depth of a Feedback FIFO. The only ways you can affect a Feedback FIFO is to restructure the code to use a smaller datatype (e.g. uchar instead of ushort) or change the access pattern if it’s a memory (register, M20K, or MLAB). You can remove the Feedback FIFO by finding a way to move its associated variable inside the loop so no state information is required.

    2) The FFwd Dest node is effectively the end point of a wire. Basically, it represents the dataflow of a variable that could come from outside or inside the loop. It’s not directly related to a Feedback node. This terminology is confusing and I had reported to the team.

    Thanks

    • DongWang-BJTU's avatar
      DongWang-BJTU
      Icon for Occasional Contributor rankOccasional Contributor
      6 years ago

      Thanks again.

      If possible, a index number could be added to the FFwd Dest nodes so that users can see where the wires came from.