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RBash's avatar
RBash
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Understanding Avalon-MM master in HLS generated code.

Hello, I'm implementing a system using HLS that has a number of on-chip memories (currently 12, but it could increase) that need to be initialized from the host, with different data widths and addre...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Avalon Conduit Interface is an interface type that accommodates individual signals or groups of signals that do not fit into any of the other Avalon types. You can

connect conduit interfaces inside a Platform Designer system. Alternatively, you can export them to connect to other modules in the design or to FPGA pins.

Thanks.

RBash's avatar
RBash
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Thank you for your response. But my question was about the conduit generated for the Avalon-MM master interface for an HLS component in particular, not conduits in general.​ If my understanding is correct, Avalon-MM master interface is supposed to control an Avalon-MM slave, but in this case (i.e., defining an Avalon-MM master interface as an input argument for an HLS component), there's also a conduit with the same name as the master in the IP generated for the component. I wanted to know what is the functionality of this particular conduit.