New Contributor
New ContributorHey,
first of: You ca not run the fpga-executables on the fpga_compile-nodes. It is therefore necessary to use the runtime-nodes (As you did in the later steps).
On the stratix-node, you will probably need to initialize the board using the usm-bsp:
aocl initialize acl0 pac_s10_usm
Before this, sycl-ls could returns something like this:
uxxxxx@s001-n142:~/$ sycl-ls [opencl:cpu:0] Intel(R) OpenCL, Intel(R) Xeon(R) Platinum 8256 CPU @ 3.80GHz 3.0 [2022.14.7.0.30_160000] [opencl:acc:1] Intel(R) FPGA SDK for OpenCL(TM), pac_s10 : Intel PAC Platform (pac_ee00000) 1.0 [2022.3] [host:host:0] SYCL host platform, SYCL host device 1.2 [1.2]
After initializing it should return the following:
uxxxxx@s001-n142:~/$ sycl-ls [opencl:cpu:0] Intel(R) OpenCL, Intel(R) Xeon(R) Platinum 8256 CPU @ 3.80GHz 3.0 [2022.14.7.0.30_160000] [opencl:acc:1] Intel(R) FPGA SDK for OpenCL(TM), pac_s10_usm : Intel PAC Platform (pac_ee00000) 1.0 [2022.3] [host:host:0] SYCL host platform, SYCL host device 1.2 [1.2]
Hope this helps,
Christoph
New ContributorHi Christoph,
I followed your instructions and was able to initialize stratix-usm but still unable to run it. It gives the same error as mentioned before.
Could you let me know if there are any flags that I might be missing during compilation ?
This is the current command I use :
dpcpp -fintelfpga -Xshardware -Xsboard=/opt/intel/oneapi/intel_s10sx_pac:pac_s10_usm vector-add-usm.cpp -o vector_usm.fpga
I've kept the code for compilation again but I've changed the code to select an FPGA hardware or nothing unlike before where it selected an FPGA EMULATOR. I'd have to see if it works.
Could you try compiling and executing the vector add sample code if possible ?
Thank You,
Avinash
