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hbens
New Contributor
6 years agoStreaming data between RTL module and OpenCL kernel using Avalon ST interface
Hi, I'm trying to to use Avalon ST interface to stream data between an OpenCL kernel and RTL module. The avalon ST interface stream data always when ovalid=1 and oready =1 as mentioned in the first...
hbens
New Contributor
6 years agoHi,
I want to clarify the question:
The question is: Can I drop the transfer of data from my RTL to the OpenCL kernel according to a condition that I can set, while receiving all inputs from the OpenCL kernel.
An example based in the first example of the Intel OpenCL advanced library and it presented in the programming guide (please see the figure below) : In this example, Can I drop the transfer of C while receiving all my A and B data. If Yes, with which signal because C is always sent aven if ovalid signal =0 ? Thanks,
Thanks