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TLeng2's avatar
TLeng2
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5 years ago

Stratix 10 MX OpenCL issue multiple constant drivers for net "const_mem_0.avm_fill_waitrequest"

Dear Intel Community, Its me again, This time I have a weird Issue. The OpenCL BSP for the Straatix 10 MX is the Intel one which exposes all HBM Memories as single memory interfaces. not as one...
DongWang-BJTU's avatar
DongWang-BJTU
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5 years ago

Where did get the this BSP ?

TLeng2's avatar
TLeng2
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5 years ago

I got the BSP in January from Intel.

We bought the Stratix MX Card with it.

At this point the OpenCL was still on intels roadmap.

Now it isnt anymore and it seems that we spent 50K$ for Developmentkits for nothing

  • jomarm10's avatar
    jomarm10
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    3 years ago

    Hi,

    I am facing the same issue. We have the same S10MX board and the same BSP... we need bigger buffers.

    We made some failed attempts to group them.

    All we get is

    Error (13224): Verilog HDL or VHDL error at lsu_token_ring.sv(207): $fatal : lsu_ic_top ring interconnect: Multiple write rings are not supported when using BSP_AVMM_WRITE_ACK
    Error (16185): Can't elaborate user hierarchy "freeze_wrapper_inst|pr_region_inst"
    Error (16186): Can't elaborate top-level user hierarchy

    Did you find any solution to this?

    Best Regards.