Forum Discussion
Wangjun8
New Contributor
New ContributorSchematic design about VREFB[2][BN0,CN0,EN0,FN0] and VREFB[3][AN0,BN0,CN0,DN0]
芯片型号AGIB027R29A1E2VC，Bank 2B/2C/2E/2F/3A/3B/3C/3D外接4组72bit的DDR4，对应的I/O bank参考电源能否通过电阻对1.2V分压来实现？还是说必须通过电源芯片（如TPS51200）输出提供0.6V的参考电压？
2 Replies
FakhrulA_alteraRegular Contributor
Hi,
You may refer to the Agilex™ 7 Power Distribution Network Design Guidelines for more clarification on this.
Regards,
Fakhrul
- FakhrulA_altera
As we haven't received a response to our previous notification, this thread will be transitioned to community support. We hope all your concerns have been addressed. If you have any new questions, please feel free to open a new thread to receive support from Intel experts. Otherwise, community users will continue to assist you here. Thank you.
