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MHASI2's avatar
MHASI2
Icon for New Contributor rankNew Contributor
6 years ago

Role of the DIFFIO_RX in FPGA MAX10 10M50DA

​What is the main role of the DIFFIO_RX pin in the MAX10 IC itself?

May I know the condition of the IC when the DIFFIO_RX becomes "High" state and vice versa.

Looking forward for the answer.

Thank you.

1 Reply

  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi Muhammad,

    I/O with this DIFFIO_RX means that the I/O can be used for transceiver RX channel. The condition of the FPGA is depending on the design itself since FPGA is configurable.

    Thank You.