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JButt5
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6 years ago

Repeated CL kernel invocation hangs after some successful runs during clFinish

It's me again and I'm facing a new issue on my way trying to use OpenCL for realtime DSP on an FPGA ;) A quick description of my setup: I've set up a custom BSP for my Terasic DE10 Standard. I've a...
JButt5's avatar
JButt5
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6 years ago

Hi,

sorry for the long delay, I saw that this question was not answered after coming back here after some time – thought I would have answered it. In the end I think it was an error on my side that let one of my custom I/O channels create a deadlock under some conditions, I solved it with a non-blocking channel read. However, thank you for your offer to have a look at my project