oneAPI on Cyclone10gx

@whitepau_altera

I successfully synthesized the niosV example (as it is), adding this top node:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity test_system is
  port (
    clk : in STD_LOGIC;
    rst : in STD_LOGIC
  );
end entity test_system;

architecture Behavioral of test_system is
    component pd_system is
        port (
            clk_clk                                          : in  std_logic                     := 'X';
            reset_reset                                      : in  std_logic                     := 'X';
            simple_dma_accelerator_device_exception_bus_data : out std_logic_vector(63 downto 0)
        );
    end component pd_system;

    signal pd_system_clk : std_logic;
    signal pd_system_rst : std_logic;

begin
    u0 : pd_system
        port map (
            clk_clk                                          => pd_system_clk,
            reset_reset                                      => pd_system_rst,
            simple_dma_accelerator_device_exception_bus_data => open
        );
    pd_system_clk <= clk;
    pd_system_rst <= rst;

end architecture Behavioral;

However when I tried (a few things) to run the software companion produced by oneAPI I got:

tetto@ubuntuoffice:~/oneAPI-samples/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/niosv/kernels/simple_dma/build$ ./simple_dma.fpga
Running on device: SimulatorDevice : Multi-process Simulator (aclmsim0)
terminate called after throwing an instance of 'sycl::_V1::runtime_error'
tetto@ubuntuoffice:~/oneAPI-samples/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/niosv/kernels/simple_dma/build$
tetto@ubuntuoffice:~/oneAPI-samples/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/niosv/kernels/simple_dma/build$ sudo ./simple_dma.fpga
[sudo] password for tetto:
./simple_dma.fpga: error while loading shared libraries: libdspba_mpir.so.23: cannot open shared object file: No such file or directory
tetto@ubuntuoffice:~/oneAPI-samples/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/niosv/kernels/simple_dma/build$ sudo LD_LIBRARY_PATH=$LD_LIBRARY_PATH  ./simple_dma.fpga
terminate called after throwing an instance of 'sycl::_V1::runtime_error'
  what():  No device of requested type available. Please check https://software.intel.com/content/www/us/en/develop/articles/intel-oneapi-dpcpp-system-requirements.html -1 (PI_ERROR_DEVICE_NOT_FOUND)
Aborted
tetto@ubuntuoffice:~/oneAPI-samples/DirectProgramming/C++SYCL_FPGA/ReferenceDesigns/niosv/kernels/simple_dma/build$

Coming back to this example, I was also playing with:

https://github.com/oneapi-src/oneAPI-samples/blob/master/DirectProgramming/C%2B%2BSYCL_FPGA/Tutorials/GettingStarted/fpga_compile/part3_dpcpp_lambda_usm/src/vector_add.cpp

oneAPI seems to produce a quartus project completed with the top node (that I can compile and synthesize), but again when I run the executable I encounter a runtime error. In that vector_add.src it seems this "unified memory" would just do the job, but I recall you mentioned earlier one has to edit the RTL design (although in this part3 the top node seems properly generated and needed IPs/avalon devices are there and instantiated).