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FelipeML's avatar
FelipeML
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5 years ago
Solved

Problem mixing FPGA and CPU kernels that resort to accessors for inter-device comms

Hi all and thanks in advance for any help that you could provide. It seems that the problem with which I opened this thread is still unsolved, and we have just found a modification that seems to na...
  • George_Silva_Intel's avatar
    George_Silva_Intel
    5 years ago

    Hi,

    This issue of CL_INVALID_BINARY when compiling with the -fintelfpga flag while trying to run on CPU + FPGA can be solved by using the following flag in place of -fintelfpga: -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice,spir64-unknown-unknown-sycldevice. The full command would then be: dpcpp -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice,spir64-unknown-unknown-sycldevice vadd.cpp -o vadd.emu

    This stems from the fact that the -fintelfpga flag instructs the compiler to perform an offline/AOT compilation which specifically targets an fpga device only (similar to CPU offline compilation). You can see more on targeting multiple platforms here, which gives examples for FPGA emulation/hardware compiles with separate source files for the CPU and FPGA kernels.

    Best regards.

FelipeML's avatar
FelipeML
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5 years ago

Hi George,

It works perfect now!

Thank you very much.

Best regards.

asenjo's avatar
asenjo
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5 years ago

Thank you George!

It actually works in emulation mode. I also compiled the final bitstream as explained below, but at runtime I got this error message:

terminate called after throwing an instance of 'cl::sycl::feature_not_supported'
  what():  SPIR-V online compilation is not supported in this context -59 (CL_INVALID_OPERATION)
/var/spool/torque/mom_priv/jobs/784102.v-qsvr-1.aidevcloud.SC: line 11: 15844 Aborted                 bin/fpga-hw

I used this script, compile_fpga_hw.sh, to compile:

source /opt/intel/inteloneapi/setvars.sh
rm -rf bin/fpga-hw.o
#/bin/echo "##" $(whoami) is compiling DPC++ example for FPGA hardware
dpcpp -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice,spir64-unknown-unknown-sycldevice -c lab/vector-add-fpga.cpp -o bin/fpga-hw.o
dpcpp -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice,spir64-unknown-unknown-sycldevice bin/fpga-hw.o -Xshardware -Xsboard=intel_a10gx_pac:pac_a10 -Xsparallel=8 -o bin/fpga-hw

And launched with this other script, just in case anyone want to reproduce it:

qsub -l nodes=1:ppn=2:fpga_compile -d . scripts/compile_fpga_hw.sh

According to the Programming Guide, two different files, one for the FPGA and a different one for the CPU, should be compiled separately and linked afterwards. I'd rather avoid this extra burden if at all possible, so I wonder what would be the compilation flags to get it running using a single source file.

Thanks once again!