PCIe 4.0 Example for Agilex 7 M-Series

Dear Wincent_Altera,

Thank you very much for the pointers! After reviewing the documentation, I see that the provided example uses the FPGA as a root point. For my setup, I have a host server from which I want to connect to the FPGA board as an end point through PCIe. Is there an example of a design for this use case?

The host is a Lenovo workstation featuring 2x Intel Xeon Gold 6416H 4 PCIe 5.0 slots. I purchased this MCIO-PCIe adapter with two MCIO SFF-TA-1016 8i cables to connect the FPGA board to the host. So far, I cannot list the FPGA PCIe device from the host using the lspci command.

The host server has installed Rocky Linux 9.5 and Quartus 24.3. Is it necessary to run Ubuntu 20.04?

Thanks,

Denisa

Hi,

Given there is no any additional question, I will left the rest to our forum community.

Please be noted that we are in full commitment in order to ensure our user success.

IF you happen to have any follow up question or new challenge, feel free to file a new thread.

Our Altera Support Agent will be there to assist.

Regards,

Wincent_Altera

Hi,

Is there any further question that I can better assist you ?

Regards,

Wincent_Altera

Hi,

For the Agilex 7 M-series HBM2e Example design and detail documentation..

You may refer to https://altera-fpga.github.io/rel-24.3.1/embedded-designs/agilex-7/m-series/pcie_rp/ug-pcie_rp-agx7m-hbm2e/#required-components
Refer to the GitHub repository for the Quartus Project and Yocto Project files.

Let me know if anything there is not clear, and I could better assist.

Regards,

Wincent_Altera