oneAPI on Cyclone10gx

I was following this:

https://www.intel.com/content/www/us/en/docs/oneapi-base-toolkit/get-started-guide-linux/2024-0/run-a-sample-project-using-the-command-line.html

and indeed I can compile with make (both emulation and fpga), the issue I experience is at runtime, when I try to execute the ./simple-add-buffers.fpga (previously I had issued cmake .. -DFPGA_DEVICE=cyclone10gx to really target my device).

Overall, I have a dual boot computer with windows10/ubuntu, on windows10 I was able to compile and download a sample vhdl to the fpga, so I am sure the board is powered ok/jtag cable is ok too, I am wondering if on ubuntu any additional driver/os related has to be installed. At the moment I have quartus prime (licence is ok) and oneAPI (on both windows10 and ubuntu). I would prefer Linux as I am more comfortable with command line, but I think I am missing something how to get the Cyclone 10gx board properly installed (my understanding was Quartus prime pro contains the cyclone10 driver..), what should I check to make sure my fpga is configured properly on my linux system?

thanks!

I am trying to compile and run this sample code:

#include <CL/sycl.hpp>
#include <iostream>
#include <sycl/ext/intel/fpga_extensions.hpp>

using namespace cl::sycl;

int main() {
    auto selector = sycl::ext::intel::fpga_selector_v;
    queue q(selector);

    const int N = 100;
    int a[N], b[N], c[N];

    // Initialize arrays on the host
    for (int i = 0; i < N; i++) {
        a[i] = i;
        b[i] = i * 2;
    }

    buffer<int, 1> buf_a(a, range<1>(N));  // Create buffers for arrays
    buffer<int, 1> buf_b(b, range<1>(N));
    buffer<int, 1> buf_c(c, range<1>(N));

    q.submit([&](handler& h) {
        auto a_acc = buf_a.get_access<access::mode::read>(h);
        auto b_acc = buf_b.get_access<access::mode::read>(h);
        auto c_acc = buf_c.get_access<access::mode::write>(h);

        h.parallel_for(range<1>(N), [=](id<1> i) {
            c_acc[i] = a_acc[i] + b_acc[i];  // Perform element-wise addition
        });
    });

    q.wait();  // Wait for completion

    // Print results on the host
    for (int i = 0; i < N; i++) {
        std::cout << c[i] << " ";
    }
    std::cout << std::endl;

    return 0;
}

following your link/suggestion I did add the proper flags (see below), I also made sure the board is seen by the OS but I still get the following runtime error:

tetto@ubuntuoffice:~/mytrial1$ jtagconfig
1) USB-BlasterII [1-1]
  031820DD   10M08SA(.|ES)/10M08S(C|L)
  02E120DD   10CX220Y

tetto@ubuntuoffice:~/mytrial1$ icpx -fsycl -fintelfpga fpga_add2.cpp -Xshardware -Xstarget=Cyclone10GX -o fpga_compile.>aoc: Compiling for FPGA. This process may take several hours to complete.  Prior to performing this compile, be sure to>

tetto@ubuntuoffice:~/mytrial1$ ./fpga_compile.fpga
terminate called after throwing an instance of 'sycl::_V1::runtime_error'
  what():  Invalid device program image: size is zero -30 (PI_ERROR_INVALID_VALUE)
Aborted (core dumped)