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kkvasan's avatar
kkvasan
Icon for New Contributor rankNew Contributor
4 years ago

OneAPi: Iterative read write with swapped memory locations

Hi All, I am using oneAPI to implement an application on Arria 10 GX acceleration card for my research work. There is a long kernel pipeline and input and output memory locations should be swapp...
yuguen's avatar
yuguen
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

If I understand your problem correctly, I would loop over:

1/ having a loop reading a part of DDR and storing the data to two local memories for both of your accessors

2/ computing on these local memories

3/ having a loop writing the two local memories back to DDR.

If you have enough private copies of the local memories, the compiler will schedule 1/ 2/ and 3/ in parallel.

So while you are computing 2/, another part of the DDR is being read and the previously computed local memory is being written to DDR.

Having these local mem, you should never stall because of DDR (assuming your kernel is compute bound).