Forum Discussion
N6000-PL MAX10 Build
- 2 years ago
Hi,
I had a discussion with one of our OFS-BMC team on the build issue and the srec_cat command and they are aware of the issue and due to release a new build script enhancement to resolve it.
Issue cause : new Quartus version added additional padding zeroes in .hex file compared to the older versions.
As the new build script is undergoing corporate release process, we could try this first by manually changing the ./build.sh script first to solve the padding issue on the hex file.
Change the command from this :
elf2hex -v bmc_bootloader.elf 0x00000000 0x0001ffff --width=32 --record=4 --little-endian-mem --no-zero-fill --create-lanes=0 bmc_bootloader.hex
To this in build.sh:
elf2hex -v bmc_bootloader.elf 0x00000000 0x0001ffff --width=8 --little-endian-mem --no-zero-fill --create-lanes=0 mem_init/max10_onchip_flash.hex
I haven't confirmed on the fix yet as I'm still currently building it on BMC v14 although they mentioned the new script is targeted for BMC v15 (max10_bmc_v3_15_0). Will let you know the result later as it will take take some time to build
Thanks
Regards
Kian
Hi,
Could you provide the commands (& arguments) that you use for programming using flash tools? I noticed in your TCL screenshot, the directory for Quartus looks like Quartus Pro 23.1 ? or just 23.1std?
OFS team will also try on their end to replicate the scenario as well and also check the critical warnings especially on the timing failure.
For those critical warnings on pin assignments too close , it is fine to disregard the warnings as those pin assignments are board dependent.
Thanks
Regards
Kian
Hi @khtan
I was actually using the GUI mode. Now that I used the commands I think I successfully got the board programmed with the binaries since both the status and alarms LEDs are lighting green on a warm bootup.
But anyways below is the attached terminal windows of the programming of the board.
I am yet to test it out with the OPAE software and check with fpgainfo and other commands but on lspci it shows up the below attached terminal window.
If you notice in the Terminal even the E810 Ethernet Controller is yet to be programmed, once that is done I'll be checking with the OPAE software.
Thank you,
Best Regards
- KianHinT_altera2 years ago
Frequent Contributor
Hi ,
Good to hear that , I will check with the OFS team on the GUI programming vs command line flash tool. Did you manage to program the rest and check with the OPAE software?
Thanks
Regards
Kian
- Beginner_in_FPGA2 years ago
Contributor
Hi @khtan,
No I haven't yet started programming the board with E810 image yet, as I was caught up with some other work. Will test it out with that and update you on the same. The only thing that is remaining to be resolved is the Timing Violations, since the BMC team is already working on that, the case can be closed.
Thank you,
Best Regards. - Beginner_in_FPGA2 years ago
Contributor
Hi @khtan
When testing with the card, did you enable PCIe Bifurcation?
Since I was building the N6000-PL , I used a server with PCIe gen4 x16, this server doesn't have support for PCIe Bifurcation. And hence I don't know whether the E810 Ethernet Controller is already programmed or not since it is not being shown in the terminal when using "lspci".
Is there any other method, using which I can confirm if my E810 Controller is already programmed, because obtaining a server with Bifurcation support may take some time. Can OPAE be used to check the same?
Thank you,
Best Regards.- KianHinT_altera2 years ago
Frequent Contributor
Hi
Sorry for the delay, for the timing violation (Critical Warning (332148): Timing requirements not met) in the build log, I've confirmed with the BMC team that it will not affect the functionality as previously they already tested the generated BMC binaries with these timing critical warnings as well.
Further investigation by the developer reveals that there is no critical timing warning issues when generated via GUI instead of command line build script. As the warning is only comes in one seed, that warning can be ignored that as other seeds(sections) are compiled properly and the build script only takes seeds where there is no critical warnings.
As for the checking whether the E810 controller working, was discussing with my colleague here and looks like the only way is via the pcie /lspci . I checked the OPAE commands and looks like cant check via commands (list of commands in OPAE https://ofs.github.io/ofs-2024.1-1/sw/fpga_tools/fpgainfo/fpgainfo/)
I'm running on server with PCIE bifurcation enabled by default
Thanks
Regards
Kian