Forum Discussion

LarryS1's avatar
LarryS1
Icon for New Contributor rankNew Contributor
4 years ago

Message removed by author

Message removed by author as moot

2 Replies

  • Hazlina_R_Intel's avatar
    Hazlina_R_Intel
    Icon for Contributor rankContributor
    4 years ago

    Hi,

    Thanks for your question. May I know the simulation/emulation or coding environment or tool that you use? What device are you targeting for your code, is it an FPGA or CPLD?


    -Hazlina


    • LarryS1's avatar
      LarryS1
      Icon for New Contributor rankNew Contributor
      4 years ago

      This is using Intel OpenCL SDK for FPGA, v 19.4 (20.3 does the same thing).

      The hardware target is Stratix 10 MX, but the failure happens in emulation.