Forum Discussion
NSriv2
New Contributor
New ContributorManually compiling aoc 17.1 generated RTL using quartus
Hi, I have some opencl code which works perfectly fine (both in emulation and on FPGA) when compiled using aoc 17.1 compiler on VLAB. Now, I want to take the generated RTL from aoc and compile it ma...
MuhammadAr_U_Intel
Contributor
ContributorHi Nitish,
May I know what is VLAB ?
Users are not expected to manually compile the OpenCL compiler generated files in Quartus. Please use OpenCL compiler to generate the bit streams.
You might want to consider the HLS compiler if you intend to generate the RTL and manually compile files in Quartus.
https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/hls-compiler.html
Thanks,
Arslan
NSriv2New Contributor
New ContributorHi Arslan,
This this Intel server + FPGA cluster (https://wiki.intel-research.net/FPGA.html#working-with-opencl). I know that we are not expected to compile the Opencl compiler generated files manually using Quartus, but I still want to do that for some research project.
Thanks,
Nitish
