Forum Discussion
PDone
Occasional Contributor
Occasional ContributorIP Upgrade for PLL fails
I am using our own board
I am running Quartus 18.1 and using a Cypress V
I am trying to run IP that I am using is upgraded.the IP Upgrade Tool. Most of the IP that I am using upgrades, but PLL In...
AbhishekD_Intel
New Contributor
New ContributorHi,
Thanks for reaching out to us.
As this issue is more related to FPGA, we are moving this issue to FPGA Forum for quicker response.
Please expect a reply from the below FPGA Forum.
https://community.intel.com/t5/Intel-High-Level-Design/bd-p/high-level-design
Warm Regards,
Abhishek
