Forum Discussion
ADua0
Occasional Contributor
7 years agoIntel Opencl kernel compiling time
I am trying to compile one of my kernel, but it is stuck at routing for more than 10 hours, but I have not even utilized even 50 % of the FPGA I have added my resource utilization report image and h...
KennyT_altera
Super Contributor
7 years agoThis usually cause by high utilization of the design for the particular are in the chip planner. Design will face this if your frequencies requirement is high. Can you try to follow the optimization base on the document https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/opencl-sdk/archives/aocl-best-practices-guide-15.0.pdf
- ADua07 years ago
Occasional Contributor
Hi thanks for the reply. Can you suggest like which page you are referring to in the above document