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Beginner_in_FPGA's avatar
Beginner_in_FPGA
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2 years ago
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Intel N6001 FIM not compiling due to script failing

Hey @khtan, I am done testing the N6000 card, and wanted to test the N6001 design in the N6000 card without enabling the E810 Controller. Hence I started building and compiling the N6001 design, but...
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  • KianHinT_altera's avatar
    KianHinT_altera
    2 years ago

    Hi ,

    I'm sorry for the delay in replying, didn't notice the my reply got saved in draft and didn't sent out before our public holiday.

    Anyway, just copied back what I wrote

    Talked to one of the our technical experts on the flashing N6001 to N6000, he mentioned should be possible if not using E810 controller. Here's some differences between those 2.

    However, we have never tested this combination before on actual hardware, so it is just theoretical in nature it might be working

    I have a look into the logs and notice that you used

    1st log

    You shouldn't use the ofs-common/scripts/common/syn/build_top.sh , instead you should use the one under /syn/scripts/build_fim_top.sh -p n6001 work_n6001 instead. In certain version they renamed the build_top.sh to build_fim_top.sh to build the one in otcshare to avoid confusion because the release version uses build_top.sh

    The guide to build the fim is located here (https://github.com/otcshare/intel-ofs-docs/blob/main/n600x/dev_guides/fim_dev/ug_dev_fim_ofs_n600x_beta3.2.md#432-compiling-the-base-fim2x4x25g) .

    Could you try building this on your end? I've also setup my station here to build it , but it will take like 5-6 hours to build

    As for the ethernet part, are you referring to the guide over here on testing the ethernet?

    https://github.com/otcshare/intel-ofs-docs/blob/main/n600x/user_guides/ofs_getting_started/ug_qs_ofs_n600x_beta3.2.md#testing-ethernet-datapath-using-dpdk

    I also noticed you submitted an IPS case on the build issue on Agilex7 pcie attach compilation as well, but i will reply there, mainly to get the command you used to generate as release version have different build commands.

    Thanks

    Regards

    kian

KianHinT_altera's avatar
KianHinT_altera
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi ,

Sorry for the delay in response , didn't receive the notification until the case been assigned.

May I know the ofs fim version that you're using (should be from otcshare?) and also the Quartus version (should be Pro 23.1 from logs) ?

Technically it is possible to run , but I'm not sure what is the exact impact if using different bitstream, saw some of the guys here been doing the same thing over here flashing n6001 to n6000 or the other way. Not sure whether it is intentional or a mistake. Let me ask around first.

Thanks

Regards

Kian

  • Beginner_in_FPGA's avatar
    Beginner_in_FPGA
    Icon for Contributor rankContributor
    2 years ago

    Hi @khtan ,

    I am using the latest otcshare fim N6001-Beta3.2.
    And Quartus Pro 2023.1.

    "Technically it is possible to run , but I'm not sure what is the exact impact if using different bitstream, saw some of the guys here been doing the same thing over here flashing n6001 to n6000 or the other way. Not sure whether it is intentional or a mistake. Let me ask around first."

    Any updates on this would be greatly beneficial in determining whether I can go ahead with programming or not.

    Thanks,
    Best Regards.

    • Beginner_in_FPGA's avatar
      Beginner_in_FPGA
      Icon for Contributor rankContributor
      2 years ago

      Hi @khtan ,
      I am trying to test the Agilex (FPGA) in N6000-PL without E810 controller with DPDK. Whether it is possible to test the only FPGA with DPDK?
      And I also tried with N60001 FIM programming in N6000-PL platform same observation. I have performed following tests using FPGA without E810 controller in N6000-PL platform.


      For N6000-PL
      -----------------
      * Programming the 2x1x100G FIM in N6000-PL platform.
      * Disable the BIOS in bifurcation setup.
      * Bind the FPGA B:D:F with vfio-pci dpdk.
      * While checking the dpdk status FPGA is detected as baseband devices.


      For N6001-PL
      ----------------
      * Programming the N6001-PL FIM 2x4x25G in N6000 PL platform.
      * Disable the BIOS in bifurcation setup.
      * Bind the FPGA B:D:F with vfio-pci dpdk.
      * While checking the dpdk status FPGA is detected as baseband devices.


      Using above procedures I bind FPGA (bcce) with vfio-pci using dpdk-devbind.py. But I am not able to execute any dpdk sample application. The application throws ' No Probed Ethernet Devices '.Please find the attached log files for your reference.

      Baseband devices using DPDK-compatible driver
      =====================================
      0000:07:00.0 'Device bcce' drv=vfio-pci unused=

      Other Baseband devices
      ======================
      0000:07:00.1 'Device bcce' unused=vfio-pci
      0000:07:00.2 'Device bcce' unused=vfio-pci
      0000:07:00.3 'Device bcce' unused=vfio-pci
      0000:07:00.4 'Device bcce' unused=vfio-pci

      Please let me know what changes to be made to work with dpdk. Waiting for your response.
      Thanks,
      Best Regards.

      • h3l1um's avatar
        h3l1um
        Icon for Occasional Contributor rankOccasional Contributor
        2 years ago


        Hi @khtan ,

        Could you please let me know if there are any updates on the query. And would you kindly provide the solution for the same.

        Thanks,
        Best Regards.