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SVasi8's avatar
SVasi8
Icon for New Contributor rankNew Contributor
6 years ago

Intel MAX 10 FPGA 10M02SCE144I7G, RAM Inference issue

The following doesn't infer RAM: Dummy_test_infer_RAM : single_port_ram GENERIC MAP(ADDR_WIDTH=> address_bits, DATA_WIDTH=>8) port map (we=> (PCI_CSx and not_R_W), clk =>clock, addr=> dummy_addr , ...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
6 years ago

Hi,

I believe the reason behind it does not infer RAM is due to the ram style is different. The first design ram style you posted in forum is MLAB while the main_ram_test design attached ram style is M9K.

MAX10 device only supports M9K or LCs memory block type. To check what type of memory block type is supported, you can go to IP Catalog, find and select RAM: 1-port IP then you can see the memory block type options that are available(supported).