Forum Discussion
mabdrahi
Contributor
2 years agoHi,
after i investigate, unfortunately data can not come as a stream. It must be put to SDRAM
to do that the DMA maybe involve. This example is probably worth looking at, it's a bare metal program but it give you an idea what has to happen at a low level to communicate with the DMA core: https://www.altera.com/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-example.html
CAlex
Contributor
2 years agoThank you,I'll check it later.