Forum Discussion
khyam
New Contributor
New ContributorHow to parameterize the single on-chip memory with different slave interfaces
Hi,
I am designing the SoC using Quartus pro 19.2 of the platform designer tool. In this design, four different IPs are used to build the complete SoC. Three master module IPs and one slave module...
EricMunYew_C_Intel
Frequent Contributor
Frequent ContributorYou can parameterize your on-chip RAM to be a dual-port RAM.
There are two slave interfaces in dual-port RAM that can be read and write independently.
You can refer to below document.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ram_rom.pdf
khyamOn-chip RAM IP support the dual port RAM enable option, so we can have two slave interface, but in my design I am looking for more than two slave interfaces, Is it possible to parameterize On-chip RAM IP with more than two slave interfaces.
