How to maping add and multiplication calculation to FPGA logic element, not DSP unit in AOC environment

Thanks Saman for sharing. Hi jinfu, You can try to refer to the example by Saman. Regarding the OpenCL inquiry, if it is still required after you refer to the example design, you may just open a new case, with title relates to function in OpenCL to avoid mapping logic into DSP. You may then let me know the case number, I will help to engage OpenCL team to route it. Thank you.