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zjinf's avatar
zjinf
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

How to maping add and multiplication calculation to FPGA logic element, not DSP unit in AOC environment

How to maping add and multiplication calculation to FPGA logic element, not DSP unit in AOC environment ! In my project(most are added and multiplication calculation ) , the DSP unit used is more th...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
7 years ago
Hi Jinfu, Thanks for your update. Sorry as I am not sure if there is any similar setting for OpenCL. Just my thought, one of the workaround that you can try is to create a logic lock for a specific module to an area without DSP block to see if it helps If this does not work, would you mind to help duplicating a new Forum case and for the OpenCL inquiry and let me konw the case number? I will help to route to our OpenCL team for further assistance. Please let me know if there is any concern. Thank you. Best regards, Chee Pin
zjinf's avatar
zjinf
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Hi cpchan

  1. For logic lock , it's OK for quartus, but i don't know how to use in aocl command in linux , if used in quartus, how to update to aocl ? any guide for this ?
  2. for "duplicating a new Forum case and for the OpenCL inquiry", where can i issue such kind topic in community forums? to which module ?

Thanks for your help!