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DongWang-BJTU's avatar
DongWang-BJTU
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

how to improve fmax for S10 FPGA when using OpenCL

I am porting my OpenCL design from Arria-10 to Stratix-10 device. On A10 FPGA (1150 device), the best fmax was around 210MHz, however, on Stratix-10 FPGA (2800 device), the best fmax was around 250M...
AnilErinch_A_Intel's avatar
AnilErinch_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi ,

There are a variety of methods which can be used to improve the fmax.

It depends on how the code has been written and what and all best practices have been used.

Please refer the document below and compare with the code base and let us know if you can incorporate any of the suggestions to improve the performance.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/opencl-sdk/aocl-best-practices-guide.pdf

Thanks and Regards

Anil