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DimitrisGrn's avatar
DimitrisGrn
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5 years ago

How to define separate bankbits on each memory replicate?

I am using Intel HLS tools to design an FPGA accelerator. In my application, I have an input array of 512 elements to my component. In each iteration of a loop, there are 3 concurrent loads to that ...
AnilErinch_A_Intel's avatar
AnilErinch_A_Intel
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5 years ago

Hi Dimitris ,

Hope you are staying safe

you can double the number of ports in the replica if you double pump the component.

So it will give you 4 ports per replicate.

You also have the flexibility to use the hls_memory and hls_bankwidth attributes to change the number of banks and bank bits.

Please refer to section 5

Component Memories (Memory Attributes)

of the following documents and try to come up with the best possible solution you can.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/hls/mnl-hls-reference.pdf

Then we can analyze the reports and can work on it further.

Thanks and Regards

Anil

  • AnilErinch_A_Intel's avatar
    AnilErinch_A_Intel
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    5 years ago

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