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SAbde7's avatar
SAbde7
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

How to create an Avalon Memory Maped FIFO with different input and output data widths in the Platform designer?

I am trying to transfer data from a PC to a FIFO on the FPGA. I am using PCIE DMA for the transfer. That data is then used in calculations, and the results are stored in another FIFO that then has to...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Sir,

The 32bits read/write is 1 Dword. For converting the data width, you may consider using Avalon ST data format adapter in the platform designer, if not, you may need to create your own custom component for your design requirement.

Regards -SK